• DocumentCode
    3295288
  • Title

    Iterative Algorithms For Formal Verification Of Embedded Real-time Systems

  • Author

    Balarin, Felice ; Sangiovanni-Vincentelli, Alberto L.

  • fYear
    1994
  • fDate
    6-10 Nov 1994
  • Firstpage
    450
  • Lastpage
    457
  • Keywords
    Automata; Concurrent computing; Embedded computing; Embedded system; Formal verification; Iterative algorithms; Real time systems; State-space methods; Time measurement; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer-Aided Design, 1994., IEEE/ACM International Conference on
  • ISSN
    1063-6757
  • Print_ISBN
    0-8186-3010-8
  • Type

    conf

  • DOI
    10.1109/ICCAD.1994.629842
  • Filename
    629842
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3295288