Study and optimization of hot-carrier degradation in high voltage pledmos transistor with thick gate oxide

The degradations of p-type lateral extended drain MOS transistors with thick gate oxide are experimentally investigated. A novel structure is proposed with a low doped boundary of the drift region without additional process, which will be helpful in reducing the electric field, reducing the degradations of electrical parameters correspondingly. The effects have been detailed analyzed by the CP measurements and MEDICI simulations. Our of the simulations results, the length of the low doped boundary of the drift region is discussed and their effect on the degradation induced by hot carriers has been investigated. An optimization structure is proposed.