DocumentCode :
3296054
Title :
Asynchronous 8-bit pipelined ADC for self-triggered sensor based applications
Author :
Kopparthy, S.P. ; Makwana, I. ; Gupta, Arpan
Author_Institution :
Dept. of Electr. & Electron. Eng., Birla Inst. of Technol. & Sci. (BITS) Pilani, Pilani, India
fYear :
2012
fDate :
5-7 Dec. 2012
Firstpage :
205
Lastpage :
210
Abstract :
This paper presents a novel architecture of Asynchronous Pipelined Analog to digital converter with emphasis on elimination of external clock for integrated self-triggered sensor based applications. The main innovative feature of the proposed pipelined ADC is that it operates without any external clock signal and performs conversion of the analog input like a combinational logic. Complete digital conversion is obtained by asynchronously propagating the partial conversions and the residues through the various stages. The only requirement for the ADC is an external trigger signal from the sensors. The proposed 8 bit ADC implemented in UMC 0.18um CMOS technology has a sampling rate of 5 MHz, with power dissipation of 30 mW and has an active area of 1.0506 mm2.
Keywords :
CMOS integrated circuits; analogue-digital conversion; sensors; UMC CMOS technology; asynchronous pipelined analog to digital converter; combinational logic; external trigger signal; frequency 5 MHz; integrated self-triggered sensor based applications; pipelined ADC; power 30 mW; size 0.18 mum; word length 8 bit; Asia; Capacitors; Clocks; Delay; Microelectronics; Pipelines; Synchronization; Muller-C; Pipelined ADC; asynchronous circuits; self-triggered sensors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics and Electronics (PrimeAsia), 2012 Asia Pacific Conference on Postgraduate Research in
Conference_Location :
Hyderabad
ISSN :
2159-2144
Print_ISBN :
978-1-4673-5065-5
Type :
conf
DOI :
10.1109/PrimeAsia.2012.6458655
Filename :
6458655
Link To Document :
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