DocumentCode :
3296134
Title :
A programmable baseband processor design for software defined radios
Author :
Rajagopal, Sridhar ; Rixner, Scott ; Cavallaro, Joseph R.
Author_Institution :
Dept. of Electr. & Comput. Eng., Rice Univ., Houston, TX, USA
Volume :
3
fYear :
2002
fDate :
4-7 Aug. 2002
Abstract :
Future wireless systems need extremely fast and flexible architectures to support varying standards, algorithms and protocols with data rates in the range of 10-100 Mbps. Software Defined Radios (SDRs) based on DSP-FPGAs are a widely proposed solution for these systems. However, these SDR solutions have not been able to meet real-time requirements. We propose a programmable architecture solution for SDRs using a stream-based architecture based on the Imagine media processor. The configurable Imagine simulator allows us to investigate issues such as memory bottlenecks, number and type of functional units needed, and the utilization of those functional units. To evaluate stream-based architectures for baseband processing, we parallelize and implement sophisticated baseband algorithms including multiuser estimation, multiuser detection and Viterbi decoding on this simulator. We present the bottlenecks in such a stream-based architecture for efficient communications processing. Comparisons with current generation DSP-based solutions show orders-of-magnitude performance improvements, both due to the stream-based nature of computations as well as the increase in the number of functional units having a high utilization factor. The result is a baseband processor designed with broad system functionality and flexibility that approaches real-time performance for future wireless systems.
Keywords :
Viterbi decoding; code division multiple access; digital simulation; multiuser detection; parallel algorithms; parallel architectures; programmable circuits; real-time systems; software radio; telecommunication computing; 10 to 100 Mbit/s; Imagine media processor; Viterbi decoding; W-CDMA based cellular system; baseband processing; configurable Imagine simulator; efficient communications processing; functional units utilization; memory bottlenecks; multiuser detection; multiuser estimation; programmable architecture; programmable baseband processor design; real-time requirements; software defined radios; stream-based architecture; wireless systems; Baseband; Computer architecture; Decoding; Multiuser detection; Process design; Software design; Software radio; Streaming media; Viterbi algorithm; Wireless application protocol;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2002. MWSCAS-2002. The 2002 45th Midwest Symposium on
Print_ISBN :
0-7803-7523-8
Type :
conf
DOI :
10.1109/MWSCAS.2002.1187061
Filename :
1187061
Link To Document :
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