Title :
Low-voltage power-efficient adder design
Author :
Margala, Martin ; Alonzo, Ronald ; Chen, Guoqing ; Jasionowski, Brandon J. ; Kraft, Keith ; Lay, Michelle ; Lindner, Jim ; Popovic, Mikhail ; Suss, Jason
Author_Institution :
Electr. & Comput. Eng. Dept., Rochester Univ., NY, USA
Abstract :
This paper presents results of a comprehensive comparative study of recently presented full-adder cells, examines their suitability in low-voltage low-power and high-performance applications and proposes a design methodology for a low-voltage power-efficient full adder. The study and the methodology are based on a power supply range of 1.0 V-1.8 V in 0.18 μm CMOS technology.
Keywords :
CMOS logic circuits; adders; circuit simulation; integrated circuit design; logic design; logic simulation; low-power electronics; 0.18 micron; 1.0 to 1.8 V; CMOS technology; full-adder cells; high-performance adders; low-power adders; low-voltage adder design; power supply range; power-efficient adder design; Adders; CMOS logic circuits; CMOS technology; Circuits and systems; Costs; Design methodology; Frequency; Page description languages; Power engineering computing; Power system reliability;
Conference_Titel :
Circuits and Systems, 2002. MWSCAS-2002. The 2002 45th Midwest Symposium on
Print_ISBN :
0-7803-7523-8
DOI :
10.1109/MWSCAS.2002.1187073
