DocumentCode :
3296425
Title :
TSV Stress Testing and Modeling for 3D IC Applications
Author :
Chidambaram, Thenappan ; McDonough, Colin ; Geer, Robert ; Wang, Wei
Author_Institution :
Coll. of Nanoscale Sci. & Eng., SUNY - Univ. at Albany, Albany, NY, USA
fYear :
2009
fDate :
6-10 July 2009
Firstpage :
727
Lastpage :
730
Abstract :
The stress investigation on through-silicon vias (TSVs) is important for 3D IC development. This work summarizes the stress measurement and modeling results for TSVs based on the use of micro-Raman spectroscopy, which can be used to determine the material, process and design of TSVs. More importantly, this study can provide an important guideline for the reliability analysis of the TSV-based 3D IC.
Keywords :
Raman spectra; integrated circuit interconnections; integrated circuit testing; mechanical testing; stress analysis; stress measurement; 3D IC application; TSV stress modeling; TSV stress testing; microRaman spectroscopy; reliability analysis; stress measurement; through-silicon vias; Frequency; Integrated circuit modeling; Integrated circuit testing; Raman scattering; Spectroscopy; Stress measurement; Tensile stress; Thermal stresses; Three-dimensional integrated circuits; Through-silicon vias;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits, 2009. IPFA 2009. 16th IEEE International Symposium on the
Conference_Location :
Suzhou, Jiangsu
ISSN :
1946-1542
Print_ISBN :
978-1-4244-3911-9
Electronic_ISBN :
1946-1542
Type :
conf
DOI :
10.1109/IPFA.2009.5232736
Filename :
5232736
Link To Document :
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