Title :
Passive SVD Based Model Order Reduction with Parametric Port Formulation
Author :
Ma, Min ; Khazaka, Roni
Author_Institution :
Dept. of Electr. & Comput. Eng., McGill Univ., Montreal, Que.
Abstract :
In this paper, a passive multi-level model reduction method is presented, which is suitable for networks with large number of ports. By using prior information about the type of the loads that can be connected to the network, the congruence transformation matrix is chosen such that it minimizes the impact of the additional ports. Furthermore, an SVD based second level of reduction is utilized in order to address the inherent inefficiencies of Krylov subspaces. The reduced order macromodels obtained using the proposed method achieve significant CPU cost saving as is demonstrated in the examples
Keywords :
passive networks; reduced order systems; singular value decomposition; Krylov subspaces; congruence transformation matrix; parametric port formulation; passive SVD based model order reduction; Circuit simulation; Costs; Distributed parameter circuits; Equations; Frequency; Integrated circuit interconnections; Reduced order systems; Telephony; Transmission line matrix methods; Voltage;
Conference_Titel :
Signal Propagation on Interconnects, 2006. IEEE Workshop on
Conference_Location :
Berlin, Germany
Print_ISBN :
1-4244-0455-x
Electronic_ISBN :
1-4244-0455-x
DOI :
10.1109/SPI.2006.289203