An investigation of timing jitter in bipolar ECL ring oscillators

Timing jitter is a concern in high speed digital circuits, the presence of timing jitter will degrade the system performance in many high speed applications, it is a critical design consideration in nearly every type of digital systems. In this paper, we have investigated the timing jitter in silicon BJT/or SiGe HBT ECL ring oscillators, and we have shown BJT/or SiGe HBT oscillators have lower jitter compared to their CMOS counterparts. As such silicon BJT and/or SiGe HBT ring oscillators are a potential choice for low jitter applications.