DocumentCode :
3297228
Title :
High-speed complex number multiplier and inner-product processor
Author :
Tull, Monte ; Wang, Guoping ; Ozaydin, Murad
Author_Institution :
Sch. of Electr. & Comput. Eng., Oklahoma Univ., Norman, OK, USA
Volume :
3
fYear :
2002
fDate :
4-7 Aug. 2002
Abstract :
Complex number arithmetic computations are one of the key arithmetic components in modern digital communication and optical systems. Complex number multiplication and complex number inner-product play a unique role in these applications. In this paper, a complex-number multiplier and complex-number inner-product processor based on a Redundant Binary (RB) representation are presented. This work is an extension of a previous real fixed-point inner-product hardware design. With the proposed algorithms, the complex number multiplication is reduced to parallel RB multiplications, and the complex number inner-product is produced using a RB addition tree. This proposed inner-product processor can be reconfigured or controlled to perform different computations such as inner-product processing or parallel multiplies for real and/or complex numbers. The design results, not only in simplified arithmetic operations, but also in a highly parallel and simple architecture when compared with other methods.
Keywords :
field programmable gate arrays; multiplying circuits; redundant number systems; Xilinx Virtex FPGA; complex number arithmetic computations; complex number multiplier; complex-number inner-product processor; high-speed multiplier; parallel redundant binary multiplications; redundant binary representation; Concurrent computing; Delay; Digital arithmetic; Digital communication; Hardware; High speed optical techniques; Laser radar; Modems; Optical computing; Optical filters;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2002. MWSCAS-2002. The 2002 45th Midwest Symposium on
Print_ISBN :
0-7803-7523-8
Type :
conf
DOI :
10.1109/MWSCAS.2002.1187121
Filename :
1187121
Link To Document :
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