Title :
Computing The Entire Active Area /power Consumption Versus Delay Trade-Off Curve For Gate Sizing With A Piecewise Linear Simulator
Author :
Berkelaar, Miche R C M ; Buurman, Pim H W ; Jess, Jochen A G
Keywords :
Circuit simulation; Combinational circuits; Computational modeling; Costs; Delay; Energy consumption; Heuristic algorithms; Linear programming; Logic gates; Piecewise linear techniques;
Conference_Titel :
Computer-Aided Design, 1994., IEEE/ACM International Conference on
Print_ISBN :
0-8186-3010-8
DOI :
10.1109/ICCAD.1994.629853
