DocumentCode
3297456
Title
Superscalar SIMD architecture
Author
Schimmel, David E.
Author_Institution
Sch. of Electr. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
fYear
1992
fDate
19-21 Oct 1992
Firstpage
573
Lastpage
576
Abstract
Presents a parallel computer architecture which synthesizes the notions of instruction level parallelism and data parallelism. Extending the work of Siegel and others on reconfigurable SIMD/MIMD architecture, it attains most of the advantages of those machines, via selective execution of a superscalar instruction stream, while retaining most of the cost advantage of the SIMD architectural style. Furthermore, it preserves the single instruction stream framework which makes SIMD machines simpler to program. Finally, it admits the use of compiler techniques to schedule the superscalar instruction stream, allowing the automatic utilization of the latent instruction level parallelism
Keywords
parallel architectures; SIMD architecture; instruction level parallelism; parallel computer architecture; reconfigurable SIMD/MIMD; superscalar; Computer architecture; Costs; Hardware; Parallel processing; Processor scheduling; Programming; Reduced instruction set computing; Software engineering; Taxonomy; VLIW;
fLanguage
English
Publisher
ieee
Conference_Titel
Frontiers of Massively Parallel Computation, 1992., Fourth Symposium on the
Conference_Location
McLean, VA
Print_ISBN
0-8186-2772-7
Type
conf
DOI
10.1109/FMPC.1992.234917
Filename
234917
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