Title :
Mapping applications to NoC platforms with multithreaded processor resources
Author :
Pop, Ruxandra ; Kumar, Shashi
Author_Institution :
Dept. of Electron. & Comput. Eng., Jonkoping Univ., Sweden
Abstract :
Network on chip (NoC) is a new design paradigm for building scalable core-based systems on chip (SoC). Multithreading is a technique for hiding long latencies of memory accesses, through the overlapped execution of several threads. In this paper, we make a case for using multi-threaded processors (MTP) as resources in NoC and describe a methodology for off-line mapping and scheduling of concurrent applications to NoC with MTPs. The experimental results show a speedup of 15% on average for a 2×2 NoC when using two MTPs with 3-thread contexts instead of two general processors (GP).
Keywords :
integrated circuit design; logic design; microprocessor chips; multi-threading; network-on-chip; general processors; multithreaded processor resources; multithreaded processors; network on chip; off line mapping; systems on chip; Buildings; Computer architecture; Delay; Design engineering; Hardware; Multithreading; Network-on-a-chip; Scheduling; Timing; Yarn;
Conference_Titel :
NORCHIP Conference, 2005. 23rd
Print_ISBN :
1-4244-0064-3
DOI :
10.1109/NORCHP.2005.1596983