Digital model for interconnect analysis

The current modeling techniques for DSM interconnects are analog based and involve complex and heavy computations. Also analog models suffer from numerical instability and truncation errors. To tackle these issues we resort to digital modeling where the transfer function is obtained through difference equations and not based on poles and zeros. The digital model of the interconnect is simulated and the results are compared with SPICE simulation. We have applied this digital model for analysing the H-tree clock distribution. The simulation results are obtained for the interconnect and H-tree clock distribution based on proposed digital model. The results were compared with the corresponding Spice output. These results show that analog modelling has far higher time complexity than the digital model. The accuracy analysis shows that the digital model has the maximum error of 2.5 percentage to Spice.