Pipelined DAC architecture using gray coding

This work describes a new architecture suitable for wideband digital to analog converter for system-on-chip. The architecture use switched capacitor pipelined D/A converter design with selection inversion based on gray coded bits. A 95dB DC-gain fully differential folded cascode gain-boosted OTA has been designed to be used in each pipelined stage. High linearity up to 61 db (SFDR) is achieved for a 5MHz input sign wave at a 50MHz update frequency. This work describes a new architecture suitable for wideband digital to analog converter for system-on-chip.