DocumentCode
3300083
Title
A hardware implementation in FPGA of the Rijndael algorithm
Author
Chitu, Cristian ; Chien, David ; Chien, Charles ; Verbauwhede, Ingrid ; Chang, Frank
Author_Institution
Dept. of Electr. Eng., Univ. of California, Los Angeles, CA, USA
Volume
1
fYear
2002
fDate
4-7 Aug. 2002
Abstract
Implementation in FPGA of the new Advanced Encryption Standard, Rijndael, was developed and experimentally tested using the Insight Development Kit board, based on Xilinx Virtex II XC2V1000-4 device. The experimental clock frequency was equal to 75 MHz and translates to the throughputs of 739 Mbit/s for Rijndael with block size and key size of 128 bits, respectively. This circuit has capability to handle encryption/decryption and fitted in one FPGA taking approximately 84% of the area. Our work supplements and extends other research efforts.
Keywords
block codes; cryptography; field programmable gate arrays; 128 bit; 739 Mbit/s; 75 MHz; Advanced Encryption Standard; FPGA; Insight Development Kit board; Rijndael algorithm; Xilinx Virtex II XC2V1000-4 device; block size; encryption/decryption; key size; throughputs; Circuit testing; Clocks; Cryptography; Field programmable gate arrays; Frequency; Hardware; Logic; NIST; Oceans; Standards development;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2002. MWSCAS-2002. The 2002 45th Midwest Symposium on
Print_ISBN
0-7803-7523-8
Type
conf
DOI
10.1109/MWSCAS.2002.1187269
Filename
1187269
Link To Document