DocumentCode
3300209
Title
0.8V 1GHz dynamic comparator in digital 90nm CMOS technology
Author
Wulff, Carsten ; Ytterdal, Trond
Author_Institution
Dept. of Electron. & Telecommun., Norwegian Univ. of Sci. & Technol., Trondheim, Norway
fYear
2005
fDate
21-22 Nov. 2005
Firstpage
237
Lastpage
240
Abstract
The design of a 0.8V 1GHz dynamic comparator in digital 90nm CMOS technology is presented. The work shows that low voltage, low power and high speed analog circuits are feasible in nano-scale CMOS technologies. The dynamic comparator dissipates a maximum of 222μW at 1 GHz clock frequency with 100fF capacitive load and 0.8 V supply voltage. This is lower than comparable results.
Keywords
CMOS digital integrated circuits; analogue circuits; comparators (circuits); high-speed integrated circuits; integrated circuit design; low-power electronics; mixed analogue-digital integrated circuits; nanotechnology; 0.8 V; 1 GHz; 100 fF; 222 muW; 90 nm; digital CMOS technology; dynamic comparator; high speed circuits; low power analog circuits; nanoscale CMOS technologies; Analog circuits; CMOS analog integrated circuits; CMOS technology; Clocks; Digital circuits; Error correction; Inverters; Latches; MOSFETs; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
NORCHIP Conference, 2005. 23rd
Print_ISBN
1-4244-0064-3
Type
conf
DOI
10.1109/NORCHP.2005.1597033
Filename
1597033
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