DocumentCode
3300301
Title
A low noise 0.9GHz FBAR clock
Author
Åberg, Markku ; Ylimaula, Miikka ; Ylilammi, Markku ; Pensala, Tuomas ; Rantala, Arto
Author_Institution
VTT Inf. Technol., Finland
fYear
2005
fDate
21-22 Nov. 2005
Firstpage
257
Lastpage
260
Abstract
A low noise 0.9GHz FBAR clock consisting of an oscillator and divider circuit for single sided-to-differential conversion for high-speed A/D-converter was designed, realized with an in-house FBAR and a commercial 0.35 μm CMOS process, and tested. The circuit showed very good jitter and phase noise performance.
Keywords
CMOS integrated circuits; acoustic resonators; analogue-digital conversion; bulk acoustic wave devices; clocks; dividing circuits; jitter; oscillators; phase noise; 0.35 micron; 0.9 GHz; CMOS process; FBAR clock; divider circuit; high-speed A/D-converter; jitter; oscillator; phase noise; sided-to-differential conversion; Acoustic transducers; Acoustic waves; Circuits; Clocks; Electrodes; Film bulk acoustic resonators; Oscillators; Piezoelectric transducers; Voltage; Zinc oxide;
fLanguage
English
Publisher
ieee
Conference_Titel
NORCHIP Conference, 2005. 23rd
Print_ISBN
1-4244-0064-3
Type
conf
DOI
10.1109/NORCHP.2005.1597038
Filename
1597038
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