DocumentCode
3300316
Title
Debugging techniques for dynamically reconfigurable hardware
Author
McKay, Nicholas ; Singh, Satnam
Author_Institution
Dept. of Comput. Sci., Glasgow Univ., UK
fYear
1999
fDate
1999
Firstpage
114
Lastpage
122
Abstract
Testing dynamically reconfigurable systems imposes new challenges which require special treatment. We present tools and techniques we developed for debugging a dynamically reconfigurable system that performs run-time constant propagation optimisations. An application for monitoring the effect of run-time specialisation is presented and we show how we adapted standard testability techniques to evaluate the performance of specialised circuits. We also outline how NDLs that capture reconfiguration at a high level can assist with debugging
Keywords
computer debugging; reconfigurable architectures; debugging; dynamically reconfigurable systems; run-time constant propagation optimisations; testability techniques; Application specific integrated circuits; Circuit testing; Clocks; Debugging; Electrical capacitance tomography; Field programmable gate arrays; Hardware; Monitoring; Runtime; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Custom Computing Machines, 1999. FCCM '99. Proceedings. Seventh Annual IEEE Symposium on
Conference_Location
Napa Valley, CA
Print_ISBN
0-7695-0375-6
Type
conf
DOI
10.1109/FPGA.1999.803673
Filename
803673
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