Comparison of an inductorless low-IF and zero-IF receiver for Bluetooth

Low-IF and zero-IF receiver architectures benefit from the high integration level and are well suited for low-cost Bluetooth single-chip solutions. The low power consumption and cost associated with zero-IF receivers contrast with simple DC offset compensation and reduced linearity requirements in low-IF receivers. Both architectures have been compared to find the best suited architecture for Bluetooth. The different receiver requirements like noise figure, compression and intercept points have been calculated and the building blocks were optimized. The receivers have been implemented in a 0.25 μ CMOS process without on-chip coils in order to reduce crosstalk and die size for system-on-chip solutions. Comparison of the two realized LNA architectures, two mixers, Gm-C and active RC filters indicated the better suitability of the low-IF receiver for a CMOS implementation, due to the increased influence of 1/f-noise and the higher required even-order linearity in a zero-IF architecture.