Title :
Design of a JTAG based run time reconfigurable system
Author :
Cousineau, Cynthia ; Laperle, François ; Savaria, Yvon
Author_Institution :
Dept. of Electr. & Comput. Eng., Ecole Polytech., Montreal, Que., Canada
Abstract :
In the past few years, the concept of run-time reconfigurable (RTR) systems has received a great deal of attention. RTR is the ability for a system to change its hardware configuration while computing, to address changing bottlenecks. This paper proposes a practical and effective means of implementing RTR systems with widely available and proven FPGA technology that keeps most of the practical benefits of RTR at the system level
Keywords :
field programmable gate arrays; reconfigurable architectures; FPGA technology; JTAG based; RTR; run time reconfigurable system; Bandwidth; Clocks; Communication system control; Control systems; Coprocessors; Engines; Field programmable gate arrays; National electric code; Runtime; System testing;
Conference_Titel :
Field-Programmable Custom Computing Machines, 1999. FCCM '99. Proceedings. Seventh Annual IEEE Symposium on
Conference_Location :
Napa Valley, CA
Print_ISBN :
0-7695-0375-6
DOI :
10.1109/FPGA.1999.803692
