• DocumentCode
    3300801
  • Title

    On reconfiguring cache for computing

  • Author

    Kim, Hue-Sung ; Somani, Arun K. ; Tyagi, Akhilesh

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA
  • fYear
    1999
  • fDate
    1999
  • Firstpage
    296
  • Lastpage
    297
  • Abstract
    The number of transistors on chip has dramatically increased within the last decade. A considerable portion of a chip is dedicated to a cache memory in a modern microprocessor chip. However, some applications may not need all the caches for storage. In addition, some applications have embedded computations with a regular structure. The behavior of the applications is static, which implies that a specialized function unit could be beneficial for the application. This presents an opportunity to explore the use of a part of a cache for performing these regular computations. In this paper, we show one such design to convert a cache into a function unit to improve the performance of an application. A reconfigurable cache takes less area than the area of a cache and a function unit together and imposes no time overhead. In order to convert a cache memory to a function unit, we mapped multi-bit output look-up tables (LUTs) into the cache structure. Therefore, the cache can perform computations When it is reconfigured as a function unit
  • Keywords
    cache storage; embedded systems; microprocessor chips; performance evaluation; reconfigurable architectures; table lookup; cache memory; cache reconfiguration; embedded computations; microprocessor chip; multi-bit output lookup tables; specialized function unit; static application behaviour; transistors; Acceleration; Bandwidth; Cache memory; Cache storage; Coprocessors; Cryptography; Embedded computing; Finite impulse response filter; Logic; Table lookup;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field-Programmable Custom Computing Machines, 1999. FCCM '99. Proceedings. Seventh Annual IEEE Symposium on
  • Conference_Location
    Napa Valley, CA
  • Print_ISBN
    0-7695-0375-6
  • Type

    conf

  • DOI
    10.1109/FPGA.1999.803704
  • Filename
    803704