Title :
A virtual logic algorithm for solving satisfiability problems using reconfigurable hardware
Author :
Abramovici, Miron ; De Sousa, Jose T.
Author_Institution :
Lucent Technol., AT&T Bell Labs., Murray Hill, NJ, USA
Abstract :
Satisfiability (SAT) is a computationally expensive algorithm central to computer science. In this paper, we present a virtual logic algorithm that allows an FPGA based reconfigurable comparing platform to process SAT solver circuits much larger than its available capacity. Our algorithm is based on decomposition techniques that create independent subproblems (pages) that fit the size of the available reconfigurable hardware. Those pages can take turns reusing the platform, and creating a virtual logic environment
Keywords :
computability; field programmable gate arrays; reconfigurable architectures; FPGA based reconfigurable comparing platform; computationally expensive algorithm; decomposition techniques; independent subproblems; reconfigurable hardware; satisfiability problem solving; satisfiability solver circuits; virtual logic algorithm; Application software; Clustering algorithms; Computer science; Electronic design automation and methodology; Field programmable gate arrays; Hardware; Logic circuits; Logic testing; Partitioning algorithms; Reconfigurable logic;
Conference_Titel :
Field-Programmable Custom Computing Machines, 1999. FCCM '99. Proceedings. Seventh Annual IEEE Symposium on
Conference_Location :
Napa Valley, CA
Print_ISBN :
0-7695-0375-6
DOI :
10.1109/FPGA.1999.803708
