FPGA-based structures for on-line FFT and DCT

Author

Lau, Dannie ; Schneider, Aaron ; Ercegovac, Milos D. ; Villasenor, John

Author_Institution

Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA

fYear

1999

fDate

1999

Firstpage

310

Lastpage

311

Abstract

This paper presents on-line arithmetic structures tailored for use in the FFT and DCT. Due to their small size, several of these modules can be connected together to form larger, more powerful blocks. The digit-serial nature of on-line arithmetic allows valuable pin resources to feed a larger number of arithmetic units than in the conventional case. Additionally, the resolution of the most significant digit first a property of on-line arithmetic allows subsequent calculations to occur at a much earlier stage. As such, performance of the FFT and DCT benefit over conventional and traditional digit-serial FPGA implementations

Keywords

discrete cosine transforms; distributed arithmetic; fast Fourier transforms; field programmable gate arrays; FPGA-based structures; arithmetic units; digit-serial on-line arithmetic; modules; on-line DCT; on-line FFT; on-line arithmetic structures; pin resources; Adders; Digital signal processing; Discrete Fourier transforms; Discrete cosine transforms; Discrete transforms; Fast Fourier transforms; Field programmable gate arrays; Pipelines; Shift registers; Table lookup;

fLanguage

English

Publisher

ieee

Conference_Titel

Field-Programmable Custom Computing Machines, 1999. FCCM '99. Proceedings. Seventh Annual IEEE Symposium on

Conference_Location

Napa Valley, CA

Print_ISBN

0-7695-0375-6

Type

conf

DOI

10.1109/FPGA.1999.803710

Filename

803710