• DocumentCode
    3301885
  • Title

    20 Db/s DCFL D-flip flop and 2:1 selector ICs using pseudomorphic inverted HEMTs

  • Author

    Shikata, M. ; Tanaka, K. ; Tsuji, H. ; Fujishiro, H.I. ; Nishi, S. ; Yamagishi, C. ; Akiyama, M.

  • Author_Institution
    Oki Electric Industry Co. Ltd., Tokyo, Japan
  • fYear
    1991
  • fDate
    8-11 Dec. 1991
  • Firstpage
    943
  • Lastpage
    946
  • Abstract
    A D-flip flop IC and a 2:1 selector IC using DCFL have been developed for applications operating above 10 Gb/s. Memory cell type flip flop (MCFF) is used for the D-flip flop IC. These ICs are fabricated using 0.2 mu m gate pseudomorphic inverted HEMTs (high electron mobility transistors), which show a high transconductance of 580 mS/mm, a high cutoff frequency of 110 GHz, and a low drain conductance of 17 mS/mm. The operations of the D-flip flop and the 2:1 selector ICs are confirmed up to 20 Gb/s by a measurement system composed of these ICs. The power dissipation is 430 mW for the D-flip flop IC and 170 mW for the 2:1 selector IC.<>
  • Keywords
    direct coupled FET logic; field effect integrated circuits; flip-flops; high electron mobility transistors; integrated logic circuits; 0.2 micron; 110 GHz; 17 mS; 170 mW; 20 Gbit/s; 2:1 selector ICs; 430 mW; 580 mS; D-flip flop IC; DCFL; cutoff frequency; drain conductance; high electron mobility transistors; memory cell type; power dissipation; pseudomorphic inverted HEMTs; transconductance; Application specific integrated circuits; Bit rate; FETs; Frequency; HEMTs; High speed integrated circuits; Inverters; MODFETs; Photonic integrated circuits; Transconductance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 1991. IEDM '91. Technical Digest., International
  • Conference_Location
    Washington, DC, USA
  • ISSN
    0163-1918
  • Print_ISBN
    0-7803-0243-5
  • Type

    conf

  • DOI
    10.1109/IEDM.1991.235270
  • Filename
    235270