Simulational study for gate oxide breakdown mechanism due to non-uniform electron current flow

Author

Kubota, M. ; Harafuji, K. ; Misaka, A. ; Yamano, A. ; Nakagawa, H. ; Nomura, N.

Author_Institution

Matsushita Electr. Ind. Co. Ltd., Osaka, Japan

fYear

1991

fDate

8-11 Dec. 1991

Firstpage

891

Lastpage

894

Abstract

A novel simulator for plasma processing has been developed and applied to analyze the gate oxide damage during parallel plate oxygen RIE (reactive ion etching) (13.56 MHz). The TDDB (time-dependent dielectric breakdown) and flat band voltage shift of a poly-silicon gate nMOS capacitor were experimentally measured. The results suggest a new mechanism where a large electron current flow near the wafer edge induces the damage.<>

Keywords

electric breakdown of solids; metal-insulator-semiconductor devices; semiconductor process modelling; sputter etching; 13.56 MHz; O/sub 2/; Si-SiO/sub 2/; TDDB; electron current flow; flat band voltage shift; gate oxide breakdown mechanism; gate oxide damage; parallel plate O/sub 2/ RIE; plasma processing; polysilicon gate nMOS capacitor; reactive ion etching; simulator; time-dependent dielectric breakdown; Analytical models; Breakdown voltage; Dielectric breakdown; Electric breakdown; Etching; MOS devices; Plasma applications; Plasma materials processing; Plasma measurements; Plasma simulation;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1991. IEDM '91. Technical Digest., International

Conference_Location

Washington, DC, USA

ISSN

0163-1918

Print_ISBN

0-7803-0243-5

Type

conf

DOI

10.1109/IEDM.1991.235282

Filename

235282