Title :
Highly reliable 2.5 nm Ta/sub 2/O/sub 5/ capacitor process technology for 256 Mbit DRAMs
Author :
Kamiyama, S. ; Saeki, T. ; Mori, H. ; Numasawa, Y.
Author_Institution :
NEC Corp., Kanagawa, Japan
Abstract :
A recently developed capacitor process technology can fabricate highly reliable 2.5 nm equivalent thick Ta/sub 2/O/sub 5/ suitable for the cylindrical stacked capacitor of 256 Mb DRAMs. The capacitor process consists of RTN (rapid thermal nitridation) treatment of native SiO/sub 2/ on the cylindrical stacked polysilicon, RTA (rapid thermal annealing) treatment after Ta/sub 2/O/sub 5/ deposition, and the use of a TiN plate electrode formation on the Ta/sub 2/O/sub 5/ film, TDDB (time-dependent dielectric breakdown) tests showed that the 2.5 nm Ta/sub 2/O/sub 5/ capacitor reliability is as high as 10 years and more for 1/2V/sub cc/=1.0 V/100 degrees C operating conditions.<>
Keywords :
DRAM chips; capacitors; electric breakdown of solids; integrated circuit technology; nitridation; rapid thermal processing; reliability; tantalum compounds; 2.5 nm; 256 Mbit; DRAMs; RTA; RTN; TDDB; Ta/sub 2/O/sub 5/; TiN plate electrode formation; TiN-Ta/sub 2/-SiO/sub 2/-Si; capacitor process technology; capacitor reliability; cylindrical stacked capacitor; cylindrical stacked polysilicon; rapid thermal annealing; rapid thermal nitridation; time-dependent dielectric breakdown; Atomic measurements; Capacitors; Dielectric films; Electrodes; Random access memory; Scanning electron microscopy; Surface treatment; Temperature; Testing; Tin;
Conference_Titel :
Electron Devices Meeting, 1991. IEDM '91. Technical Digest., International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-0243-5
DOI :
10.1109/IEDM.1991.235297
