DocumentCode :
3303034
Title :
Investigating phase-shifting mask layout issues using a CAD toolkit
Author :
Wong, A.S. ; Newmark, D.M. ; Rolfson, J.B. ; Whiting, R.J. ; Neureuther, A.R.
Author_Institution :
Electron. Res. Lab., California Univ., Berkeley, CA, USA
fYear :
1991
fDate :
8-11 Dec. 1991
Firstpage :
705
Lastpage :
708
Abstract :
Phase-shifting mask layout issues for nonregular designs are investigated using a new CAD (computer-aided design) toolkit. Using this toolkit, the periphery cells of a nonregular 16-Mb DRAM scaled for 64-Mb design rules are analyzed for their phase-shifting potential. On average, a 0.5 shrink factor applied to a layer of the DRAM periphery mask results in an effective shrink factor of 0.53, since some areas of the mask have phase conflicts. In this case, 94% of the cell area is easily shiftable using two phases. Possible solutions are recommended for the remaining difficult areas. The toolkit contains components for the global shrinking, phase-assignment, design-rule checking, region extraction, and region replacement of a mask layer. Using the initial shrink factor and violation data generated by the toolkit, an effective shrink factor based on phase-conflicts can be calculated for a particular design. The toolkit can also be used to assist in translating a traditional design into a phase-shifted one interactively from within a mask layout editor.<>
Keywords :
DRAM chips; VLSI; circuit layout CAD; masks; photolithography; semiconductor process modelling; 0.5 shrink factor; 16 Mbit; 16-Mb DRAM; 64 Mbit; 64-Mb design rules; CAD toolkit; DRAM periphery mask; ULSI; computer-aided design; design-rule checking; difficult areas; effective shrink factor; global shrinking; irregular designs; mask layer; mask layout editor; nonregular designs; periphery cells; phase conflicts; phase-assignment; phase-shifting mask layout issues; region extraction; region replacement; shrinking; violation data; DRAM chips; Data mining; Design automation; Feedback; Geometry; Image analysis; Laboratories; Lithography; Phased arrays; Random access memory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1991. IEDM '91. Technical Digest., International
Conference_Location :
Washington, DC, USA
ISSN :
0163-1918
Print_ISBN :
0-7803-0243-5
Type :
conf
DOI :
10.1109/IEDM.1991.235325
Filename :
235325
Link To Document :
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