Research on optimization design of high efficient low noise SiC-MOSFETs inverters

This paper presents an optimized design example of high efficient inverter which consists of Silicon-Carbide (SiC) Metal-Oxide-Semiconductor-Field-Effect-Transistor (MOSFET) and optimized gate driver for SiC-MOSFETs. The purpose of this research is to optimize design of SiC-MOSFETs inverters. We confirmed that the proposed inverter is capable of operating efficiently with experimental results. The proposed gate driver can reduce switching losses and switching time without increasing surge and ringing voltage. We also analyzed effects of removing Schottky-Barrier-Diode (SBD) from SiC-MOSFETs power modules. Removing SBDs gives some positive effects that can not only reduce cost and size of inverters, but also can reduce switching surge and ringing voltage. SiC-MOSFETs without SBDs have bigger damping coefficient and smaller junction capacitance than SiC-MOSFETs with SBDs. The bigger damping coefficient can reduce ringing voltage. The smaller junction capacitance can reduce switching losses and noise.