Voltage regulator with reduced power processing

In this paper a new topology of a voltage regulator with high power factor and improved efficiency is presented. Traditional topologies correct the power factor processing twice the energy, having a poor efficiency. Recently, some new techniques to process less than twice the energy and therefore increasing the efficiency were proposed, one loop without power processing is used In this paper is proposed a new topology that process less than twice the energy, but two loops without power processing are used, therefore an improved efficiency is obtained.