A fast VLSI chip for computing the two-dimensional discrete cosine transform

Author

Wong, William S. ; Berno, Anthony ; Alnuweiri, Hussein M.

Author_Institution

Dept. of Electr. Eng., British Columbia Univ., Vancouver, BC, Canada

Volume

2

fYear

1993

fDate

19-21 May 1993

Firstpage

662

Abstract

A VLSI chip which performs an 8-point discrete cosine transform (DCT) using distributed arithmetic and Li´s (1991) algorithm has been successfully designed and tested. Its total throughput is as high as 250 Mb/s, which is of the order required for real-time applications such as the compression of video. Both the size and performance of the chip can be substantially improved through changes in its technology and design. Work on a 2-D DCT processor based on this unit is in progress

Keywords

digital arithmetic; digital signal processing chips; discrete cosine transforms; real-time systems; two-dimensional digital filters; very high speed integrated circuits; 2-D DCT processor; 250 Mbit/s; 8-point discrete cosine transform; VLSI chip; compression of video; design; distributed arithmetic; performance; size; technology; Algorithm design and analysis; Arithmetic; Circuits; Discrete cosine transforms; Discrete transforms; Image coding; Performance evaluation; Signal processing algorithms; Very large scale integration; Video compression;

fLanguage

English

Publisher

ieee

Conference_Titel

Communications, Computers and Signal Processing, 1993., IEEE Pacific Rim Conference on

Conference_Location

Victoria, BC

Print_ISBN

0-7803-0971-5

Type

conf

DOI

10.1109/PACRIM.1993.407274

Filename

407274