DocumentCode
3303650
Title
On-chip testing of embedded programmable logic arrays
Author
Macii, Enrico ; Wolf, Tara
Author_Institution
Dept. of Electr. & Comput. Eng., Colorado Univ., Boulder, CO, USA
Volume
2
fYear
1993
fDate
19-21 May 1993
Firstpage
654
Abstract
The authors consider the problems associated with on-chip testing of programmable logic arrays (PLAs) which are deeply embedded in VLSI systems. A detailed summary of the built-in logic block observer (BILBO) approach to embedded PLA testing is given. Then, an innovative method for on-chip testing, which makes use of the input/output registers of the PLA as test aids, is presented. This method is less area-consuming than the traditional BILBO technique
Keywords
VLSI; built-in self test; integrated circuit testing; logic testing; observers; programmable logic arrays; BILBO; VLSI systems; built-in logic block observer; embedded PLA testing; input/output registers; on-chip testing; programmable logic arrays; Automatic testing; Built-in self-test; Circuit testing; Logic design; Logic testing; Programmable logic arrays; Registers; System testing; Test pattern generators; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, Computers and Signal Processing, 1993., IEEE Pacific Rim Conference on
Conference_Location
Victoria, BC
Print_ISBN
0-7803-0971-5
Type
conf
DOI
10.1109/PACRIM.1993.407276
Filename
407276
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