DocumentCode :
3303701
Title :
Progress and challenges in building evolvable devices
Author :
Stoica, Adrian ; Zebulum, Ricardo ; Keymeulen, Didier
Author_Institution :
Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA
fYear :
2001
fDate :
2001
Firstpage :
33
Lastpage :
35
Abstract :
This paper presents JPL progress in building evolution-oriented reconfigurable devices. It surveys the FPTA family, and presents details of the latest chip, FPTA2, an array of 64 reconfigurable cells that can implement mixed-signal functions, include programmable capacitors and resistors and integrate photodetectors as part of a built-in vision sensor. The chip was fabricated in 0.18 micron CMOS. The paper also discusses some of the challenges in building such chips, as well as lessons learned while evolving circuits
Keywords :
CMOS integrated circuits; field programmable gate arrays; photodetectors; reconfigurable architectures; 0.18 micron CMOS; FPTA family; FPTA2; built-in vision sensor; evolution-oriented reconfigurable devices; evolvable devices; mixed-signal functions; programmable capacitors; reconfigurable cells; Buildings; Capacitive sensors; Capacitors; Field programmable analog arrays; Hardware; Integrated circuit interconnections; Laboratories; Photodetectors; Resistors; Sensor arrays;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Evolvable Hardware, 2001. Proceedings. The Third NASA/DoD Workshop on
Conference_Location :
Long Beach, CA
Print_ISBN :
0-7695-1180-5
Type :
conf
DOI :
10.1109/EH.2001.937944
Filename :
937944
Link To Document :
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