DocumentCode :
3304183
Title :
Evolvable Internet hardware platforms
Author :
Lockwood, John W.
Author_Institution :
Dept. of Comput. Sci., Washington Univ., St. Louis, MO, USA
fYear :
2001
fDate :
2001
Firstpage :
271
Lastpage :
279
Abstract :
Network routing platforms and Internet firewalls of the next decade will be radically different than the platforms of today. They will contain modular components that can be dynamically reconfigured over the Internet. But, unlike the active networks that are in the research labs today, these new platforms will not suffer from the performance penalty of processing packets in software. These platforms will implement routing, packet filtering and queuing functions in reprogrammable hardware. The hardware of the system will evolve over time as packet processing algorithms and protocols progress. The granularity of the system will be configurable down to the level of the logic gates. These logic gates, and the interconnections between them, will be reconfigurable over the Internet. These routers will enable new services to be rapidly deployed over the Internet and operate at the full rate of the Internet backbone link. Through the development of the Field Programmable Port Extended (FPX), a platform has been built that demonstrates how networking modules can be used for rapid prototype and deployment of networking hardware. The platform includes high-speed network interfaces, multiple banks of memory and Field Programmable Gate Array (FPGA) logic. Applications have been developed for the FPX that include Internet packet routing, data queuing and application-level data modification. The FPX is currently used as a component in an evolvable router
Keywords :
Internet; active networks; authorisation; computer networks; logic gates; network interfaces; network routing; protocols; FPGA; Field Programmable Port Extended; Internet firewalls; evolvable Internet hardware platforms; evolvable router; high-speed network interfaces; modular components; network routing platforms; packet filtering; protocols; queuing functions; reprogrammable hardware; Field programmable gate arrays; Hardware; IP networks; Information filtering; Logic gates; Programmable logic arrays; Reconfigurable logic; Routing; Software performance; Web and internet services;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Evolvable Hardware, 2001. Proceedings. The Third NASA/DoD Workshop on
Conference_Location :
Long Beach, CA
Print_ISBN :
0-7695-1180-5
Type :
conf
DOI :
10.1109/EH.2001.937971
Filename :
937971
Link To Document :
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