Phase Aligned Clock Multiplier

Phase aligned clock multiplier is designed for high performance applications where high-speed clocks are needed including PCs, workstations, and telecom applications. In this paper, a clock multiplier is designed based on the ideology of phase locked loops. It has the following features: operating supply voltage is 1.8 V ; input frequency range is 10-83.33 MHz; output frequency range is 5-166.67 MHz ; input-to-output skew is 200 ps ; 3-multiplier configuration ; output selectable pin phase alignment; single phase locked loop architecture; internal loop filter.