DocumentCode
3304402
Title
Low Cost Architecture of Digital Circuit for FPGA Implementation Based ICA Training Algorithm of Blind Signal Separation
Author
Ounas, M. ; Touhami, R. ; Yagoub, M.C.E.
Author_Institution
USTHB Univ., Algiers
fYear
2007
fDate
July 30 2007-Aug. 2 2007
Firstpage
135
Lastpage
138
Abstract
In this paper, we have illustrated the design of the computation of implementation which is principally based on finding correct values of the convergence of the update weights based on Independent Component Analysis (ICA) training algorithm that performs the application of Blind Signal Separation (BSS). We targeted simple computation of implementation, which yields to less complex architecture of the digital of implementation. Over the adjustment of the update weight with the mutual information approach, we reduced the high computation needed for the calculation of ICA training algorithm. The simulation results, obtained from a case study of FPGA implementation, demonstrated the correctness of the adjustment of the update weight with high performance of hardware implementation for BSS algorithm.
Keywords
blind source separation; digital circuits; field programmable gate arrays; independent component analysis; BSS; FPGA implementation; ICA training algorithm; blind signal separation; digital circuits; independent component analysis; Algorithm design and analysis; Blind source separation; Computer architecture; Convergence; Costs; Digital circuits; Field programmable gate arrays; Independent component analysis; Mutual information; Signal design; Architecture; BSS; Convergence; Digital Circuit; FPGA; ICA; Low Cost; adjustment; implementation; update weights;
fLanguage
English
Publisher
ieee
Conference_Titel
Signals, Systems and Electronics, 2007. ISSSE '07. International Symposium on
Conference_Location
Montreal, Que.
Print_ISBN
1-4244-1448-2
Electronic_ISBN
1-4244-1449-0
Type
conf
DOI
10.1109/ISSSE.2007.4294432
Filename
4294432
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