DocumentCode :
3304668
Title :
A performance analysis for the arbitor of IEEE standard backplane bus Futurebus/Futurebus+
Author :
Yamamoto, Ou ; Takemoto, Takashi ; Kimura, Teturou ; Amano, Hideharu
Author_Institution :
Fac. of Sci. & Technol., Keio Univ., Yokohama, Japan
Volume :
2
fYear :
1993
fDate :
19-21 May 1993
Firstpage :
386
Abstract :
The arbitration protocols of the IEEE Futurebus and Futurebus+ are analyzed with both a theoretical model and a real machine. Some problems are found in the fairness scheme on Futurebus
Keywords :
IEEE standards; protocols; system buses; Futurebus; Futurebus+; IEEE standard backplane bus; arbitration protocols; fairness scheme; performance analysis; theoretical model; Backplanes; Frequency; Hardware; Performance analysis; Protocols; Steady-state;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications, Computers and Signal Processing, 1993., IEEE Pacific Rim Conference on
Conference_Location :
Victoria, BC
Print_ISBN :
0-7803-0971-5
Type :
conf
DOI :
10.1109/PACRIM.1993.407340
Filename :
407340
Link To Document :
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