Low power NMOS CPAL circuits and adiabatic sequential circuits

A new low-power adiabatic logic, NMOS complementary pass-transistor adiabatic logic (NCPAL), is proposed. The NCPAL circuit uses pure NMOS transistors and a three-phase power supply. The bootstrapped NMOS switch is employed to eliminate non-adiabatic loss of output loads and simplifies the NCPAL circuits. Its energy dissipation is less dependent on the power-clock frequency and insensitive to output load capacitance. The design of adiabatic sequential circuit is explored. A practical sequential system based on the NCPAL is designed and demonstrated. With TSMC 0.25 μm CMOS technology, the NCPAL inverter chain is at least 2.5 times more energy efficient than 2N-2N2P, and 5 to 10 times less dissipative than the static CMOS for clock rates ranging from 20 to 200 Mhz.