DocumentCode
3306250
Title
An indium phosphide backside via process for microwave and millimeter wave applications
Author
Bui, S. ; Oki, A. ; Nguyen, N. ; Tran, L. ; Streit, D.
Author_Institution
TRW Inc., Redondo Beach, CA, USA
fYear
1992
fDate
21-24 April 1992
Firstpage
680
Lastpage
681
Abstract
Summary form only given. A backside via process suitable for use on standard monolithic microwave integrated circuit (MMIC) technologies has been developed for indium phosphide based substrate material. A wet etch via process has been developed to allow for the use of standard GaAs type microstrip transmission lines and layout design rules for advanced MMICs. This wet etch process can etch backside vias with bottom dimension as small as 40 mu m in diameter in InP material with the same design rules as conventional GaAs processes.<>
Keywords
III-V semiconductors; MMIC; etching; indium compounds; integrated circuit technology; III-V semiconductor; InP; backside via process; layout design rules; monolithic microwave integrated circuit; wet etch via process; Gallium arsenide; Indium phosphide; Integrated circuit technology; MMICs; Microstrip; Microwave integrated circuits; Microwave technology; Monolithic integrated circuits; Standards development; Wet etching;
fLanguage
English
Publisher
ieee
Conference_Titel
Indium Phosphide and Related Materials, 1992., Fourth International Conference on
Conference_Location
Newport, RI, USA
Print_ISBN
0-7803-0522-1
Type
conf
DOI
10.1109/ICIPRM.1992.235544
Filename
235544
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