Temperature dependence of low-frequency gain dispersion in ion-implanted InP JFETs

Measurements of the temperature dependence of the low-frequency transconductance and output resistance dispersion commonly associated with deep-level trapping are presented for an ion-implanted InP JFET. The results of these measurements indicate that one trapping mechanism can be observed in the transconductance of an ion-implanted InP JFET. This trap causes a transition frequency at 3 kHz at room temperature, and has an activation energy of about 0.18 eV at 4 V on the drain. It appears to be located on the surface or in the channel of the device. In the output resistance two transitions can be observed at room temperature with a third one appearing at temperatures below about 200 K. The first two appear to be caused by traps in the region near the channel-substrate interface. The activation energies are about 0.44 and 0.55 eV at 5 V on the drain. The origin of the trapping mechanisms could be due to several causes. In addition to surface states, which are strongly affected by the passivation utilized, the primary possibilities are the iron doping in the semi-insulating substrate into which the channel and gate regions are implanted and the implantation itself, which could cause damage which is not completely annealed out.<>