Modeling and simulation of a MOSFET transistor in Verilog-A considering parasite elements

The DC/DC Boost converter due to their physical characteristics have a relationship between the switching frequency and inductance value, the use of frequencies above 20 kHz reduces the required size of the inductor. To handle such switching frequencies is common to use MOSFET (Metal-Oxide Semiconductor Field-Effect Transistor) power semiconductor devices, these elements have losses due to parasite elements. This paper presents the impact that have the parasite elements into a boost convert through a program developed in Verilog-A.