DocumentCode :
3308002
Title :
Using Dependability, Performance, Area and Energy Consumption Experimental Measures to Benchmark IP Cores
Author :
de Andres, D. ; Ruiz, Juan-Carlos ; Gil, Pedro
Author_Institution :
Fault-Tolerant Syst. Group (GSTF), Univ. Politec. de Valencia, Valencia, Spain
fYear :
2009
fDate :
1-4 Sept. 2009
Firstpage :
49
Lastpage :
56
Abstract :
The selection of IP cores for integration in hardware systems requires the evaluation, comparison and ranking of all eligible core candidates. In this context, the development of suitable benchmarking techniques to balance the different performance, dependability, area and energy consumption measures is an essential, but also a challenging task. This paper specifies a benchmarking approach that exploits the capabilities of hardware prototyping tools to support system integrators in the selection of IP cores. The goal is to enable the benchmarking of such cores in the early system design phases, as soon as their models can be synthesised on reconfigurable devices. Results show the feasibility of the approach and provide a taste of the kind of comparison and selection process supported by the benchmark.
Keywords :
energy consumption; network-on-chip; IP cores benchmark; energy consumption; hardware prototyping tools; reconfigurable devices; system design phases; Area measurement; Costs; Electronic design automation and methodology; Energy consumption; Energy measurement; Field programmable gate arrays; Hardware design languages; Manufacturing; Microprocessors; Prototypes; Dependability benchmarking; IP cores;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Dependable Computing, 2009. LADC '09. Fourth Latin-American Symposium on
Conference_Location :
Joao Pessoa
Print_ISBN :
978-1-4244-4678-0
Electronic_ISBN :
978-0-7695-3760-3
Type :
conf
DOI :
10.1109/LADC.2009.17
Filename :
5234318
Link To Document :
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