Gbps signal transmission on Si CMOS ULSI

Author

Masu, Kazuya

Author_Institution

Integrated Res. Inst., Tokyo Inst. of Technol., Yokohama, Japan

fYear

2005

fDate

11-14 Dec. 2005

Firstpage

10

Lastpage

14

Abstract

We have developed on-chip transmission line interconnect for Gbps signal transmission on cm-order long metal interconnects. In this paper, design and electrical performance of differential transmission lines, high density transmission line interconnect structure, Tx/Rx circuit are presented. Furthermore, it is also shown that the both delay time and power consumption of DTL global interconnect are become superior to that of the conventional RC global interconnect with repeaters as a technology node progressed, such as in below 90nm technology node.

Keywords

CMOS integrated circuits; ULSI; elemental semiconductors; integrated circuit interconnections; silicon; transmission lines; CMOS ULSI technology; Si; differential transmission lines; global interconnects; on chip transmission line interconnect; signal transmission; CMOS technology; Delay effects; Distributed parameter circuits; Frequency; Inductance; Integrated circuit interconnections; Large scale integration; Power transmission lines; Repeaters; Ultra large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics Materials and Packaging, 2005. EMAP 2005. International Symposium on

Print_ISBN

1-4244-0107-0

Type

conf

DOI

10.1109/EMAP.2005.1598226

Filename

1598226