Passivation of InP for MISFET applications

Author

Viktorovitch, P. ; Gendry, M. ; Hollinger, G. ; Krawczyk, S. ; Tardy, J.

Author_Institution

Lab. d´´Electronique-Ecole Centrale de Lyon, Ecully, France

fYear

1992

fDate

21-24 April 1992

Firstpage

51

Lastpage

55

Abstract

The development of appropriate passivation schemes for III-V compound semiconductors is of considerable interest for application to high-speed, high-power and electrooptic devices and integrated circuits. Attention is given here to InP in connection with insulated gate technology for MISFET applications. A brief survey of the interfacial electronic properties of insulator-InP systems and a general description of the authors´ approach to the passivation of InP are given. Specific passivation procedures based on the formation of interfacial native oxides and on surface stabilization by arsenic and sulfur are presented for illustration.<>

Keywords

III-V semiconductors; indium compounds; insulated gate field effect transistors; passivation; InP; MISFET applications; electrooptic devices; high-power; high-speed; insulated gate technology; integrated circuits; passivation; semiconductors; Dielectrics and electrical insulation; Fabrication; Frequency; Indium phosphide; Interface states; Kinetic theory; MISFETs; Microwave devices; Passivation; Shape;

fLanguage

English

Publisher

ieee

Conference_Titel

Indium Phosphide and Related Materials, 1992., Fourth International Conference on

Conference_Location

Newport, RI, USA

Print_ISBN

0-7803-0522-1

Type

conf

DOI

10.1109/ICIPRM.1992.235709

Filename

235709