Gigabit rate achieving low-power LDPC codes: Design and architecture

The quality of any communication system is greatly determined by the performance excellence of the selected channel coding scheme. In this work, we propose algorithms for designing LDPC channel coding schemes. The proposed designs are suitable for achieving Gigabit communications with relatively low-power consumption. We design LDPC code family with fixed block length and no puncturing. Also, starting with an LDPC code base-family, we construct LDPC code families with longer block length but decodable using the same hardware as the base-family. We propose a unified decoder architecture, which can decode all LDPC codes in the designed base-family as well as all LDPC codes in the derived code families with longer block length.