Variable Topology Cartesian Genetic Programming for Combinational Circuit

Evolvable hardware is consisted of hardware and evolvable algorithm. It has the ability of self-organization, self-adapt, self-repair and auto-design. Because of its important application values and the shortcomings of traditional methods, generating evolvable circuit with quick speed and obtaining the optimal evolvable circuit are the hotspot in the field of evolvable circuit. In this paper a two stage evolution algorithm is proposed, which use variable topology genetic coding to improve the flexibility of Cartesian Genetic Programming (CGP). Simulation results demonstrate the validity and performance of the proposed method.