• DocumentCode
    3313404
  • Title

    A new unified modular adder/subtractor for arbitrary moduli

  • Author

    Thian Fatt Tay ; Chip-Hong Chang

  • Author_Institution
    Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, Singapore
  • fYear
    2015
  • fDate
    24-27 May 2015
  • Firstpage
    53
  • Lastpage
    56
  • Abstract
    Efficient modular adders and subtractors for arbitrary moduli are key booster of computational speed for high-cardinality Residue Number Systems as they rely on arbitrary moduli set to expand the dynamic range. This paper proposes a new unified modular adder/subtractor that possesses a regular structure for any modulus. Compared to the latest modular adder/subtractor, which works for modulus in the forms of 2n±k, the proposed design is on average 10.81% faster and consumes 15.85% less hardware area and 2.51% lower power for n ranging from 4 to 8.
  • Keywords
    adders; residue number systems; arbitrary moduli; computational speed; high cardinality residue number systems; regular structure; unified modular adder-subtractor; Adders; Computer architecture; Delays; Dynamic range; Hardware; Logic gates; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (ISCAS), 2015 IEEE International Symposium on
  • Conference_Location
    Lisbon
  • Type

    conf

  • DOI
    10.1109/ISCAS.2015.7168568
  • Filename
    7168568