CMOS self checking circuits with faulty sequential functional blocks

Author

Metra, Cecilia ; Favalli, Michele ; Riccò, Bruno

Author_Institution

Dipartimento di Elettronica Inf. e Sistemistica, Bologna Univ., Italy

fYear

1994

fDate

17-19 Oct 1994

Firstpage

133

Lastpage

141

Abstract

In this paper, Self Checking Circuits (SCCs) with sequential functional blocks are studied from the point of view of problems possibly arising at the system level because of internal resistive bridging faults (BFs). Electrical level design rules and checking schemes reducing the occurrence probability of such problems are proposed and their effectiveness is verified. Moreover, the sequential functional blocks obtained with the methodology of this paper are Strongly Fault Secure (SFS) with respect to stuck-at faults

Keywords

CMOS logic circuits; CMOS self checking circuits; electrical level design rules; faulty sequential functional blocks; internal resistive bridging faults; strongly fault secure; stuck-at faults; system level; Automatic testing; Circuit faults; Combinational circuits; Conferences; Electrical fault detection; Error correction codes; Fault detection; Fault tolerant systems; Sequential circuits; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Defect and Fault Tolerance in VLSI Systems, 1994. Proceedings., The IEEE International Workshop on

Conference_Location

Montreal, Que.

ISSN

1550-5774

Print_ISBN

0-8186-6307-3

Type

conf

DOI

10.1109/DFTVS.1994.630023

Filename

630023

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3313548