Design of an automatic testing for FPGAs

This paper presents a new design for testing SRAM-based field programmable gate arrays (FPGAs). The original SRAM part is modified a bit so that the FPGA gets the ability to automatically shift the data on-chip and then the test becomes faster. This method does not need a large outside memory (off-chip memory) for saving the test data. It is proved that this method detects multiple faults and covers 100%; of modeled faults. The simulation results of Xilinix XC4000 family, using CAD tools, shows that the routing and the placement of this method are easily achieved.