Performance investigation of DG-FinFET for subthreshold applications

Subthreshold circuits have received widespread attention towards fulfilling ultralow power requirement of battery operated portable devices. Si-MOSFET shows huge performance degradation in terms of speed and robustness against variations when operated in subthreshold region. Improving the same will further expand their application area. DG FinFETs are most promising even in subthreshold region which overcomes most of the limitations of Si-MOSFET device. This paper investigates the effect of DG FinFET device parameters on the performance of 1-bit full adder cell and five stage ring oscillator. The work in this paper shows that by optimizing the fin and oxide thicknesses, the subthreshold performance of DG FinFET can be significantly improved. The effect of Process, Voltage, and Temperature (PVT) variation on robustness of circuit has been also explored under subthreshold conditions.