An analog VLSI edge detection chip and digital multiprocessor chip for neural-based vision processing

A mixed-signal VLSI design for early vision processing, which includes an analog edge detection chip with embedded array photosensors and a digital multiprocessor chip, is described. The system architecture overview shows that the combination of the analog chip and the digital processors can perform highly efficient processing in neural-based vision processing. The analog edge detection chip consisting of 258×258 photosensor cells can be implemented in an area of 13.5 mm×15.5 mm using the MOSIS 0.8-μm CMOS technology. The digital multiprocessor chip, which includes 64 processing elements, can be implemented in a 15.0-mm×18.0-mm chip using an industrial-scale 0.5-μm CMOS technology. A system implementation for fingerprint verification is presented as an example of possible applications